Imxrt1180 nxp evk lpadc&hyperflash by Jason0204 · Pull Request #11529 · RT-Thread/rt-thread

Jason0204 · 2026-06-28T09:23:04Z

拉取/合并请求描述：(PR description)

[

LPADC:

these channels A1_4, A1_6, A1_7, B1_5, B1_6, B1_7 are routed to LPADC1 peripheral based on CM33 core from XIP boot-up, and multi-channel sampling is enabled with DMA. They are configured to VDDA_ADC_1P8 as VREFH source, full scale input(max 1.8V), you can check CM33/board/MIMXRT1180-CM33-ADC.mex and cm33/figures for more details.
all the configured channels are verified in msh, but drv_adc can only support A1_4, B1_5, A1_6 and A1_7, this is a limitation of driver.

HyperFlash:

[imxrt1180-nxp-evk] BSP: octal flexspi to drive hyper flash(MT35XU512) is supported by enabling FlexSPI1 and eDMA4, MCU_Config software is used for low-level configuration(pin_mux, clock).

为什么提交这份PR (why to submit this PR)

submit BSP development task for imxrt1180-nxp-bsp

你的解决方案是什么 (what is your solution)

LPADC:

use MCU_Config software for peripheral initialization as much as possible.
update drv_adc to enable LPADC1 and eDMA4.
update board.c to call BOARD_CommonSetting function and comment Region 11 (OCRAM1).

HyperFlash:

use MCU_Config software for clock and pinmux initialization.
update drv_flexspi to enable flexspi1 and eDMA4 TX/RX channels.
update board.c to call BOARD_CommonSetting function and MCU_Config location.
boot-up M7 from CMSIS-DAP to enter msh of RT-Thread, because FlexSPI1 A1 has already set to XIP boot for CM33, pin-muxed with octal hpyer flash(MT35XU512).

请提供验证的bsp和config (provide the config and bsp)

LPADC:

BSP:

bsp\nxp\imx\imxrt\imxrt1180-nxp-evk\cm33
bsp\nxp\imx\imxrt\imxrt1180-nxp-evk\cm33\packages\nxp-imxrt-sdk-latest\MIMXRT1180\SConscript
bsp\nxp\imx\imxrt\libraries\drivers\drv_lpadc

HyperFlash:

bsp\nxp\imx\imxrt\imxrt1180-nxp-evk\cm7
bsp\nxp\imx\imxrt\imxrt1180-nxp-evk\cm7\packages\nxp-imxrt-sdk-latest\MIMXRT1180\SConscript
bsp\nxp\imx\imxrt\libraries\drivers\drv_flexspi

LPADC:

.config:
CONFIG_BSP_LPADC1_USING_DMA=y

HyperFlash:

.config:
CONFIG_BSP_USING_DMA=y
CONFIG_BSP_USING_FLEXSPI=y
CONFIG_BSP_USING_FLEXSPI1=y

action: not defined it yet.

]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality：

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

已经仔细查看过代码改动的对比 Already check the difference between PR and old code
代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
没有垃圾代码，代码尽量精简，不包含#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up
所有变更均有原因及合理的，并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
代码是高质量的 Code in this PR is of high quality
已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification
如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

CLAassistant · 2026-06-28T09:23:10Z

Thank you for your submission! We really appreciate it. Like many open source projects, we ask that you sign our Contributor License Agreement before we can accept your contribution.
_{You have signed the CLA already but the status is still pending? Let us recheck it.}

github-actions · 2026-06-28T09:23:12Z

👋 感谢您对 RT-Thread 的贡献！Thank you for your contribution to RT-Thread!

为确保代码符合 RT-Thread 的编码规范，请在你的仓库中执行以下步骤运行代码格式化工作流（如果格式化CI运行失败）。
To ensure your code complies with RT-Thread's coding style, please run the code formatting workflow by following the steps below (If the formatting of CI fails to run).

🛠 操作步骤 | Steps

前往 Actions 页面 | Go to the Actions page
点击进入工作流 → | Click to open workflow →
点击 Run workflow | Click Run workflow

设置需排除的文件/目录（目录请以"/"结尾）
Set files/directories to exclude (directories should end with "/")
将目标分支设置为 \ Set the target branch to：imxrt1180_nxp_evk_lpadc
设置PR number为 \ Set the PR number to：11529

等待工作流完成 | Wait for the workflow to complete
格式化后的代码将自动推送至你的分支。
The formatted code will be automatically pushed to your branch.

完成后，提交将自动更新至 imxrt1180_nxp_evk_lpadc 分支，关联的 Pull Request 也会同步更新。
Once completed, commits will be pushed to the imxrt1180_nxp_evk_lpadc branch automatically, and the related Pull Request will be updated.

如有问题欢迎联系我们，再次感谢您的贡献！💐
If you have any questions, feel free to reach out. Thanks again for your contribution!

nxp-ran · 2026-06-29T02:28:29Z

-MCUX_Config/pin_mux.c
+MCUX_Config_LPADC1/clock_config.c
+MCUX_Config_LPADC1/pin_mux.c
+MCUX_Config_LPADC1/peripherals.c


这边还是有上次PR中提到的问题，麻烦SConscript中的src不用改，保持原来：
MCUX_Config/clock_config.c
MCUX_Config/pin_mux.c

nxp-ran · 2026-06-29T02:28:51Z

-if GetDepend(['BSP_USING_QSPI_FLASH_FS']):
-    src += ['ports/drv_flexspi_nor_flash.c', 'ports/fal_flash_port.c']
-
-CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']


这边麻烦也不用改

Rbb666 · 2026-06-29T01:38:14Z

 #include <rtdevice.h>
 #include <drv_gpio.h>
 #include <fsl_rgpio.h>



这个文件不需要修改

Rbb666 · 2026-06-29T01:40:21Z

+    {
+    }
+#else
+	for(i=0;i<7;i++) {


代码需要格式化，可以查看rtthread仓库根目录下的.clang-format

checked out formatting tool, reformatted the codes.

Rbb666 · 2026-06-29T05:42:23Z

存在ci编译报错

CYFS3 · 2026-07-01T05:27:12Z

@Jason0204 麻烦请问一下我看提交了好几张图片，这个是准备写文档还是？

nxp-ran · 2026-07-01T06:12:04Z

+
+Command settings are consisted of group A and group B (GRPA, GRPB). GRPA is used for channel A1_4, A1_5, A1_7, while GRPB is used for channelB1_5, B1_6, B1_7. 
+
+![lpadc1_GRPA_command](C:\Users\Administrator\Desktop\RTT-IMXRT1180\rt-thread\bsp\nxp\imx\imxrt\imxrt1180-nxp-evk\cm33\board\MCUX_Config_LPADC1\figures\lpadc1_GRPA_command.png)


这些图片路径麻烦换成相对路径

OK. will do

Jason0204 · 2026-07-01T12:33:24Z

@Jason0204 麻烦请问一下我看提交了好几张图片，这个是准备写文档还是？

我为了写readme.txt, 记录变更和测试过程，让读者更清楚怎么更改和测试。

nxp-ran · 2026-07-03T08:21:54Z

@Rbb666 lpadc 和 hyperflash 测试也都通过，麻烦merge。谢谢！

nxp-ran · 2026-07-03T09:21:38Z

@Jason0204 麻烦把package中的改动也PR到https://github.com/RT-Thread-packages/nxp-imxrt-sdk ，谢谢

…A1_7) sampling demo based on CM33 core from XIP boot-up. eDMA4 is optional to offload CPU.

…n CM7 core. eDMA4 is optional to offload CPU.

Rbb666 · 2026-07-14T08:47:07Z

@Jason0204 存在编译报错问题，还是需要解决下

Copilot

Pull request overview

This PR adds bring-up support for the imxrt1180-nxp-evk BSP covering LPADC1 (multi-channel + optional eDMA) on CM33 and HyperFlash (FlexSPI1 octal + optional eDMA) on CM7, largely relying on MCUXpresso Config Tools–generated low-level initialization.

本 PR 为 imxrt1180-nxp-evk BSP 增加板级支持：CM33 侧新增 LPADC1（多通道 + 可选 eDMA），CM7 侧新增 HyperFlash（FlexSPI1 octal + 可选 eDMA），并且大量依赖 MCUXpresso Config Tools 生成的底层初始化代码。

Changes / 变更点：

Add LPADC1 driver updates with DMA-based multi-sample path and ADC vref/resolution reporting.
更新 LPADC1 驱动以支持 DMA 多通道采样，并补充 ADC 分辨率/Vref 查询接口。
Add HyperFlash support path (FlexSPI LUT/OPI DDR sequences) and optional EDMA transfer integration.
增加 HyperFlash 支持路径（FlexSPI LUT/OPI DDR 指令序列）及可选 EDMA 传输支持。
Introduce MCUX_Config generated sources/docs and CI attach configs for both features.
引入 MCUX_Config 生成代码/说明文档，并增加对应 CI attach 配置。

PR metadata checklist notes / PR 元信息检查：

Title / 标题: current title doesn’t follow the required lowercase prefix format (e.g. [nxp][imxrt] ...). Consider something like:
English: [nxp][imxrt1180] enable lpadc1 dma and hyperflash on imxrt1180-nxp-evk
**中文：**建议按仓库规范使用小写前缀，例如：[nxp][imxrt1180] enable lpadc1 dma and hyperflash on imxrt1180-nxp-evk
Description / 描述: the template bracket block ([...]) and instructional text are still present; please remove the template text and keep only the actual PR description + test evidence.
描述中仍保留了模板方括号块和说明文字，建议清理，仅保留真实的变更说明与测试信息。

Reviewed changes

Copilot reviewed 29 out of 48 changed files in this pull request and generated 7 comments.

Show a summary per file

File	Description
bsp/nxp/imx/imxrt/libraries/drivers/drv_lpadc.h	Adds board/channel notes (currently mostly commented).
bsp/nxp/imx/imxrt/libraries/drivers/drv_lpadc.c	LPADC enable/convert updated; adds DMA completion flow; registers ADC1.
bsp/nxp/imx/imxrt/libraries/drivers/drv_flexspi.c	Adds EDMA-based FlexSPI handle/callback and OSPI LUT variants.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/rtconfig.h	Enables cache + BSP feature macros (DMA/FLEXSPI/OSPI).
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/SConscript	Conditionally builds octal flash ops when BSP_USING_OSPI_FLASH is enabled.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/ports/flexspi_port.h	Adds CM7 FlexSPI/OSPI + DMA channel definitions.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/ports/flexspi_octal_flash_ops.c	Adds octal flash erase/read/program helpers (DMA + polling paths).
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/MCUX_Config_hyperFlash/readme.md	Adds HyperFlash setup/test documentation.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/MCUX_Config_hyperFlash/pin_mux.h	Generated pin mux header for HyperFlash scenario.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/MCUX_Config_hyperFlash/pin_mux.c	Generated pin mux source for HyperFlash scenario.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/MCUX_Config_hyperFlash/clock_config.h	Generated clock config header for HyperFlash scenario.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/MCUX_Config_hyperFlash/clock_config.c	Generated clock config source for HyperFlash scenario.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/Kconfig	Adds BSP_USING_OSPI_FLASH option under onboard peripherals.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/board/board.c	Adds TRDC permission setup and calls BOARD_CommonSetting() in init.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/.config	Enables DMA/FLEXSPI/OSPI_FLASH and cache-related config.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm7/.ci/attachconfig/ci.attachconfig.yml	Adds CI attach configs for HyperFlash (DMA/non-DMA).
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/rtconfig.h	Enables RT_USING_ADC + LPADC/DMA related BSP macros.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/readme.md	Adds LPADC1 routing/config/test documentation.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/pin_mux.h	Generated LPADC1 pin mux header.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/pin_mux.c	Generated LPADC1 pin mux source.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/peripherals.h	Generated peripherals header (ADC1 + DMA4 CH0).
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/peripherals.c	Generated peripherals init (LPADC + EDMA setup).
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/clock_config.h	Generated LPADC1 clock config header.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/MCUX_Config_LPADC1/clock_config.c	Generated LPADC1 clock config source.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/Kconfig	Adds LPADC/LPADC1/LPADC1_DMA Kconfig options.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/board/board.c	Calls BOARD_InitPeripherals() during board init.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/.config	Enables RT_USING_ADC and LPADC-related configs.
bsp/nxp/imx/imxrt/imxrt1180-nxp-evk/cm33/.ci/attachconfig/ci.attachconfig.yml	Adds CI attach configs for LPADC1 (DMA/non-DMA).

+    edma_config_t userConfig;
+	edma_handle_t dmaTxHandle;
+    edma_handle_t dmaRxHandle;


+    g_Transfer_Done = false;
+    EDMA_StartTransfer(&DMA4_CH0_Handle);
+    /* Wait for EDMA transfer finish */
+    while (g_Transfer_Done != true)
+    {
+    }


+//    BOARD_InitLeds();
    BOARD_BootClockRUN();
-
+    BOARD_InitPeripherals();
+


+    for(i=0;i<7;i++)
+    {
 #if (defined(FSL_FEATURE_LPADC_FIFO_COUNT) && (FSL_FEATURE_LPADC_FIFO_COUNT == 2U))
-    while (!LPADC_GetConvResult(base, &mLpadcResultConfigStruct, 0U))
+        while (!LPADC_GetConvResult(base, &mLpadcResultConfigStruct, 0U))
 #else
-    while (!LPADC_GetConvResult(base, &mLpadcResultConfigStruct))
+        while (!LPADC_GetConvResult(base, &mLpadcResultConfigStruct))
 #endif /* FSL_FEATURE_LPADC_FIFO_COUNT */
+        {
+        }
+        adc_result[i] = (mLpadcResultConfigStruct.convValue);
+    }


+
+### 2.1 pin configuration in MCUX_Config software
+
+![pin_config](.\figures\pin_config.png)


+
+### 3. FlexSPI1_b octal mode test
+
+![flexspi_test result](.\figures\flexspi_test result.png)


+    /* Enable all read/write/execute access for MRC/MBC access control. */
+    (void)memset(&memAccessConfig, 0, sizeof(memAccessConfig));
+    memAccessConfig.nonsecureUsrX  = 1U;
+    memAccessConfig.nonsecureUsrW  = 1U;
+    memAccessConfig.nonsecureUsrR  = 1U;
+    memAccessConfig.nonsecurePrivX = 1U;
+    memAccessConfig.nonsecurePrivW = 1U;
+    memAccessConfig.nonsecurePrivR = 1U;
+    memAccessConfig.secureUsrX     = 1U;
+    memAccessConfig.secureUsrW     = 1U;
+    memAccessConfig.secureUsrR     = 1U;
+    memAccessConfig.securePrivX    = 1U;
+    memAccessConfig.securePrivW    = 1U;
+    memAccessConfig.securePrivR    = 1U;


Jason0204 requested a review from Rbb666 as a code owner June 28, 2026 09:23

github-actions Bot added BSP: NXP Code related with NXP BSP labels Jun 28, 2026

nxp-ran reviewed Jun 29, 2026

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Rbb666 reviewed Jun 29, 2026

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Jason0204 changed the title ~~Imxrt1180 nxp evk lpadc~~ Imxrt1180 nxp evk lpadc&hyperflash Jun 30, 2026

nxp-ran reviewed Jul 1, 2026

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Jason0204 force-pushed the imxrt1180_nxp_evk_lpadc branch 2 times, most recently from ece1a8b to 6fca2f9 Compare July 6, 2026 16:21

jasontek added 2 commits July 7, 2026 20:49

[nxp][bsp]: implement LPADC1 peripheral multi-channel(A1_4,B1_5,A1_6,…

45f1796

…A1_7) sampling demo based on CM33 core from XIP boot-up. eDMA4 is optional to offload CPU.

[nxp][bsp]: add flexSPI1 octal hyper flash(MT35XU512) example based o…

16e467f

…n CM7 core. eDMA4 is optional to offload CPU.

Jason0204 force-pushed the imxrt1180_nxp_evk_lpadc branch from 6fca2f9 to 16e467f Compare July 7, 2026 13:00

Rbb666 closed this Jul 14, 2026

Rbb666 reopened this Jul 14, 2026

Rbb666 requested a review from Copilot July 14, 2026 09:31

Copilot started reviewing on behalf of Rbb666 July 14, 2026 09:31 View session

Copilot AI reviewed Jul 14, 2026

View reviewed changes


		Command settings are consisted of group A and group B (GRPA, GRPB). GRPA is used for channel A1_4, A1_5, A1_7, while GRPB is used for channelB1_5, B1_6, B1_7.

		![lpadc1_GRPA_command](C:\Users\Administrator\Desktop\RTT-IMXRT1180\rt-thread\bsp\nxp\imx\imxrt\imxrt1180-nxp-evk\cm33\board\MCUX_Config_LPADC1\figures\lpadc1_GRPA_command.png)


		### 2.1 pin configuration in MCUX_Config software

		![pin_config](.\figures\pin_config.png)


		### 3. FlexSPI1_b octal mode test

		![flexspi_test result](.\figures\flexspi_test result.png)

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Jason0204 commented Jun 28, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

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拉取/合并请求描述：(PR description)

LPADC:

HyperFlash:

为什么提交这份PR (why to submit this PR)

你的解决方案是什么 (what is your solution)

LPADC:

HyperFlash:

请提供验证的bsp和config (provide the config and bsp)

LPADC:

HyperFlash:

LPADC:

HyperFlash:

当前拉取/合并请求的状态 Intent for your PR

代码质量 Code Quality：

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github-actions Bot commented Jun 28, 2026

🛠 操作步骤 | Steps

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Rbb666 commented Jun 29, 2026

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Jason0204 commented Jul 1, 2026

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Jason0204 commented Jun 28, 2026 •

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Jason0204 Jun 29, 2026 •

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nxp-ran commented Jul 3, 2026 •

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